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Figure 1 from A low power 10 bit, 80 MS/s CMOS pipelined ADC at 1.8 V ...
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Design of a low power 10 bit 300 ksps multi-channel SAR ADC for ...
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Figure 1 from A low power 1-V 10-bit 40-MS/s pipeline ADC | Semantic ...
A low power 10‐bit 1 MS/s cyclic analog to digital converter for ...
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Design of a Low Power 10-b 8-MS/s Asynchronous SAR ADC with On-Chip ...
Design of a Low Power 10-b 8-MS/s Asynchronous SAR ADC with On-Chip ...