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Figure 1 from An 80-MHz 0.4V ULV SRAM macro in 28nm FDSOI achieving 28 ...
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Figure 1 from Design and Performance Analysis of 6T SRAM cell on 90nm ...
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Figure 1 from Retention Problem Free High Density 4T SRAM cell with ...
03C3SRAM In-Memory-Computing SRAM Macro Based On Capacitive-Coupling ...
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Figure 1 from Multiple-bit-upset and single-bit-upset resilient 8T SRAM ...
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